Following the article that I have published last year in VLSI-SoC entitled “A Product Engine for Energy-Efficient Execution of Binary Neural Networks Using Resistive Memories”, I am proud to announce that an extended version of that same article was published as a chapter of a book containing revised and extended versions of selected papers of that conference. The book can be purchased here. In addition, we also filed a patent application for the RRAM-based convolutional block.
Abstract:
The need for efficient Convolutional Neural Networks (CNNs) targeting embedded systems led to the popularization of Binary Neural Networks (BNNs), which significantly reduce execution time and memory requirements by representing the operands using only one bit. Also, due to 90% of the operations executed by CNNs and BNNs being convolutions, a quest for custom accelerators to optimize the convolution operation and reduce data movements has started, in which Resistive Random Access Memory (RRAM)-based accelerators have proven to be of interest. This work presents a custom Binary Dot Product Engine (BDPE) for BNNs that exploits the low-level compute capabilities enabled by RRAMs. This new engine allows accelerating the execution of the inference phase of BNNs by locally storing the most used kernels and performing the binary convolutions using RRAM devices and optimized custom circuitry. Results show that the novel BDPE improves performance by 11.3%, energy efficiency by 7.4% and reduces the number of memory accesses by 10.7% at a cost of less than 0.3% additional die area.
Categories: Research