Em seguimento do artigo que publiquei no ano passado na conferência internacional VLSI-SoC entitulado “A Product Engine for Energy-Efficient Execution of Binary Neural Networks Using Resistive Memories”, é com grande satisfação que anuncio que uma versão detalhada desse mesmo artigo foi publicada como um capítulo de um livro contendo versões detalhadas e revistas de artigos selecionados dessa conferência. O livro pode ser adquirido através deste link. Adicionalmente, submetemos uma candidatura de patente sobre o bloco convolucional baseado em RRAM utilizado neste trabalho.
Sumário (apenas em inglês):
The need for efficient Convolutional Neural Networks (CNNs) targeting embedded systems led to the popularization of Binary Neural Networks (BNNs), which significantly reduce execution time and memory requirements by representing the operands using only one bit. Also, due to 90% of the operations executed by CNNs and BNNs being convolutions, a quest for custom accelerators to optimize the convolution operation and reduce data movements has started, in which Resistive Random Access Memory (RRAM)-based accelerators have proven to be of interest. This work presents a custom Binary Dot Product Engine (BDPE) for BNNs that exploits the low-level compute capabilities enabled by RRAMs. This new engine allows accelerating the execution of the inference phase of BNNs by locally storing the most used kernels and performing the binary convolutions using RRAM devices and optimized custom circuitry. Results show that the novel BDPE improves performance by 11.3%, energy efficiency by 7.4% and reduces the number of memory accesses by 10.7% at a cost of less than 0.3% additional die area.
Categorias: Investigação